Multiplexer design in VHDL
The multiplexer is an essential digital circuit to select one of different inputs, structurally the 2x1 multiplexer circuit consists of 2 and gates 1 OR gate and a NOT gate as shown in the following figure
The 4x1 multiplexer can then be created using three 2x1 multiplexer and 8x1 multiplexer can be created using two 4x1 multiplexer and one 2x1 multiplexer and so on.
In this post we are going to illustrate the different methods of implementing multiplexers in VHDL.
1- structural 2x1 multiplexer in VHDL
2- 2x1 multiplexer using when statement
3- 2x1 multiplexer using if statement
4- 2x1 multiplexer using case statement
RTL view for the circuit created using the code in Example 1.
RTL view for the circuit created using the code in Example 2, 3 & 4.