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Understanding Flip Flops & Latches in VHDL

D Flip-Flops & Latches are the smallest storage elements in digital circuits.

The D Flip Flop stores the value of the input D with the rising edge or the falling edge of the input Clock, while the Latch stores the value of the input D with the level of the input Clock, either high or low. The VHDL code for D Flip Flops and latches are nearly similar but it is usually recommended to use D Flip Flops as a storage elements to avoid timing problems, this tutorial illustrates the VHDL design of different types of D Flip Flops and Latches


VHDL Code for rising edge flip flop :



VHDL Code for falling edge D flip flop :


VHDL Code for D Flip flop with synchronous reset :



VHDL Code for D flip flop with asynchronous reset :


VHDL Code for D Latch :



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