3 Phase generator in VHDL

This work represents the design and implementation of a 3 Phase sinewave generator in VHDL, the hardware used in this project is the Xilinx spartan 3AN FPGA devalopment kit, this kit has SPI digital to analog converter with 4 channels(LTC2624 Quad DAC) which can be used to generate 3 analog waveforms.

The sine wave is created using ROM with 4096 location, the same ROM can be used to generate 2 sine waves by adding a delay line or simply by using 3 ROMs with shifted address or shifted content, in order to send the data to the DAC an SPI controller is created in VHDL which sends the SPI commands and Data to the LTC 2624 IC to generate the signal correctly

The frequency of the generated sine wave is adjusted based on the clock frequency and the number of samples in the ROM according to the following equation

F = fclk / 4096

The fclk can be then created using a clock divider code or using PLL. The design is tested using oscilloscope in lab, connections are made as shown in the figure

IMG-20180303-WA0002

IMG-20180303-WA0000

And the results shows that the design is performing the required function, the complete project is available on request

This is the Top entity for the design :

#Xilinx #FPGA #VHDL