Memory Modeling in Verilog
Verilog support two dimensional arrays which are used in Memory modeling. These two dimensional arrays actually represents an array of registers, any location in the array can be accessed by its index (address).
In this post we will demonstrate the verilog code for single port RAM, dual port RAM, dual port RAM with different read, write clocks and ROM.
- Verilog code for 256x8 single port ram:
- Verilog code for 256x8 dual port ram :
- Verilog code for 256x8 dual port ram with separate read/write clock :
- Verilog code for 256x8 ROM :
Rom content after initialization from text file :
