N-bit Adder in VHDL

To create a structural adder circuit based on Full Adder, the best way is to use generate statement. This code represents the design of 8 bit adder based on full adder and it can be easily configured to any bit size by modifying the generic n value in the top level code.

Code for N-bit Adder

Test Bench :

RTL View of the implemented circuit from the code :

simulation results :

#vhdl #adder