What is VHDL?
VHDL is a language that describes digital hardware and it is used by industry worldwide, VHDL coding actually means using code syntax for digital circuit description by specifying all its internal components and connecting wires (signals) using code therefore the VHDL code is parallel structure and it is not executed line by line like other programming languages such as C, C++ and C#.
VHDL is an acronym for VHSIC (Very High Speed Integrated Circuit) Hardware Description Language, the VHDL code can be only a single file or a top level connecting different modules (VHDL files). One of the most important features of VHDL is that it is technology/Vendor independent this means that the VHDL code can be used to implement digital circuits on any FPGA/CPLD Regardless of the Vendor or the target device. Another important feature of VHDL code is that it’s not case sensitive for example:
databus
Databus
DataBus
DATABUS
are all equivalent
VHDL is a “free format” language No formatting conventions, such as spacing or indentation imposed by VHDL compilers. Space and carriage return treated the same way.
Example:
if (a=b) then
or
or
if (a =
b) then
are all equivalent
VHDL code sections
The VHDL code consists of three main sections:
1- Libraries section
2- Entity section
3- Architecture section
1-The Libraries section is the section in which different libraries are declared. In VHDL the library is a collection of commonly used pieces of code, grouped for reuse.
Libraries are added in the code library’s section according to the design requirements, for example if the VHDL design involves unsigned arithmetic standard logic operations, the library IEEE.STD_LOGIC_UNSIGNED should be used.
2-The Entity section is the part of the code that demonstrates the design ports, as discussed earlier the VHDL describes a digital circuit and the entity section is the VHDL code that describes the circuit inputs and outputs.
3-The Architecture is the section of the code that describes the circuit or in other words describes the circuit functionality, this section may include the declaration of internal connecting wires (called signals), constants and components
I hope that was useful, in the next post we are going to discuss the VHDL ports and the data types.